High Sensitivity Dynamic Range Enhanced Complementary Metal–Oxide–Semiconductor Imager with Noise Suppression

Abstract

In a high sensitivity complementary metal–oxide–semiconductor (CMOS) image sensor featuring a high conversion gain floating diffusion (FD) with a lateral overflow integration capacitor (LOFIC) in a pixel, the methods of the feedback noise suppression and the FD dark current reduction are discussed. The noise floor is found to be suppressed by introducing a small FD capacitance with the reduced feedback capacitance of a pixel source follower in accordance with a noise feedback theory. The reduction of the full well capacity due to the small FD capacitance causes the reduced tolerance for the FD dark current at the switching point from a low light signal (S1) to a bright light signal (S2). However it is solved by the reduction of the electric field concentrations at the FD in conjunction with the LOFIC capacitance optimization. A 1/4 in. video graphics array (VGA) format CMOS image sensor fabricated through 0.18 µm two-poly three-metal process demonstrates both 2.2 e- rms noise floor and an invisible signal-to-noise (S/N) ratio degradation at the S1/S2 switching point under 2 s integration time while the full well capacity is extended up to 100 ke-.