Abstract

High performance (high speed and high wiring density) computer packaging can be obtained by applying thin film technology to the multichip interconnection structure. The thickness of the layers, as determined by the electrical requirements, necessitates the use of a via-fill process in conjunction with straight-wall openings in the dielectric layers. The packaging performance and wiring density is improved through reduced via areal dimensions (increased number of lines per layer), through elimination of stepcoverage limitations, and through better planarity thus increasing the number of signal and power layers. The MCNC split cathode magnetron was found to be the best RIE system for obtaining high rate low pressure oxygen RIE of polyimide films. The polyimide etch process was studied, characterized and optimized for the anisotropic residue free etch of 4 µm to 12 µm thick polyimide films. The etched wafers were then processed through the subsequent via filling step and reproducible planar via-filling was achieved with an electroless Ni plating process.

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