High performance sub-0.1 μm silicon n-metal–oxide–semiconductor transistors with composite metal/polysilicon gates

Abstract

A new fabrication process for sub-0.1 μm silicon n-metal–oxide–semiconductor field effect transistors with composite metal/polysilicon gates is described. Gate resistance is reduced below that of plain polysilicon or silicided gates, so that higher speed performance is obtained from shorter gate length devices. The process has resulted in 0.08 μm channel length ring oscillators with record per stage delays of 10.5 ps at 85 K and 13 ps at room temperature, and unity-current-gain cutoff frequencies of 119 GHz at 85 K and 93 GHz at 300 K. Record high transconductances of 1040 mS/mm at 85 K and 740 mS/mm at 300 K have been measured in 0.05 μm channel length devices.