High performance raised source/drain InAs/In0.53Ga0.47As channel metal-oxide-semiconductor field-effect-transistors with reduced leakage using a vertical spacer

Abstract

We demonstrate raised source/drain InAs/In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors incorporating a vertical spacer in the high-field region between the channel and the drain. The spacer significantly reduces off-state leakage at a high drain bias (VDS) without increasing the source/drain contact pitch. Subsequently, thinning the InAs layer within the channel further reduces the off-state leakage and subthreshold swing (SS). At ∼60 nm gate length and VDS = 0.5 V, devices with a 6 nm/3 nm InAs/In0.53Ga0.47As channel show 2.7 mS/μm peak transconductance (gm) and 125 mV/dec SS, while devices with a 4.5 nm/3 nm InAs/In0.53Ga0.47As channel show 2.4 mS/μm peak gm and 96 mV/dec SS.