High Performance Four-Quadrant Analog Multiplier Using DXCCII

Abstract

This paper presents a four-quadrant analog multiplier using a single dual-X second-generation current conveyor (DXCCII). The proposed analog multiplier employs two NMOS transistors operating in triode region, besides a single DXCCII. The performances of the proposed analog multiplier are verified through PSPICE simulation using 0.18 μm TSMC CMOS process parameters. Simulation results reveal that the circuit has a − 3 dB bandwidth of 19.30 GHz and 0.79% total harmonic distortion for the input voltage of 250 mV. The application of proposed analog multiplier as a squarer, for amplitude modulation and as frequency doubler are also included. The detailed comparisons with existing literature justify the novelty of the proposed circuit.