High mobility strained Si 0.5Ge 0.5/SSOI short channel field effect transistors with TiN/GdScO 3 gate stack

Abstract

Short channel p-type metal-oxide-semiconductor field effect transistors (MOSFETs) with GdScO 3 gate dielectric were fabricated on a quantum well strained Si/strained Si 0.5Ge 0.5/strained Si heterostructure on insulator. Amorphous GdScO 3 layers with a dielectric constant of 24 show small hysteresis and low density of interface states. All devices show good performance with a threshold voltage of 0.585 V, commonly used for the present technology nodes, and high I on/I off current ratios. We confirm experimentally the theoretical predictions that the drive current and the transconductance of the biaxially strained (1 0 0) devices are weakly dependent on the channel orientation. The transistor’s hole mobility, extracted using split C– V method on long channel devices, indicates an enhancement of 90% (compared to SiO 2/SOI transistors) at low effective field, with a peak value of 265 cm 2/V s. The enhancement is however, only 40% at high electrical fields. We demonstrate that the combination of GdScO 3 dielectric and strained SiGe layer is a promising solution for gate-first high mobility short channel p-MOSFETs.