Abstract
MOSFETs using channel materials with high mobility and low effective mass have been regarded as strongly important for obtaining high current drive and low supply voltage CMOS under sub 10 nm regime. From this viewpoint, attentions have recently been paid to SiGe, Ge and III–V channels. Thus, CMOS family utilizing III–V/Ge channels on Si substrates can be key devices for high performance and low power advanced LSIs in the future. In this paper, possible solutions for realizing III–V/Ge MOSFETs on the Si platform are presented with an emphasis on CMOS integration of III–V and Ge MOSFETs as ultra-thin body channels, which is mandatory for scaled CMOS. The high quality III–V channel formation on Si substrates can be realized through direct wafer bonding. The gate stack formation, which is also a critical issue for III–V/Ge CMOS integration, is constructed on a basis of atomic layer deposition (ALD) Al 2 O 3 gate insulators for both InGaAs and Ge MOSFETs. Another important concern in the integration process of III–V and Ge MOSFETs is source/drain (S/D) formation. Ni-based metal S/D technologies are implemented for both InGaAs and Ge MOSFETs. By combining these technologies, we demonstrate successful integration of InGaAs-OI nMOSFETs and Ge p-MOSFETs on a same wafer and their superior device performance.
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