High-energy ion implantation for ULSI

Abstract

The “well engineering” of a retrograde twin well formed by high-energy ion implantation for 0.5 μm CMOS is demonstrated to be quite useful in improving many device characteristics, such as leakage current reduction, soft-error immunity, low latchup susceptibility, smaller device isolation dimensions, etc. In forming a heavily doped buried layer by high-energy ion implantation, a drastic reduction in leakage current has been found. This would be caused by gettering of impurities or mudefects by secondary defects which are induced either by implantation of dopant itself (“self-gettering”) or by an additional implantation of oxygen, carbon or fluorine (“proximity gettering”).