Abstract

We introduce a simple all-inline variation of a balanced optical cross-correlator (BOC) that allows to measure the arrival time difference (ATD), over the full Nyquist bandwidth, with increased common-mode rejection and long-term stability. An FPGA-based signal processing unit allows for real-time signal normalization and enables locking to any setpoint with an unprecedented accuracy of 0.07 % within an increased ATD range of more than 400 fs, resulting in attosecond resolution locking. The setup precision is verified with an out-of-loop measurement to be less than 80 as residual jitter paving the way for highly demanding applications such as parametric waveform synthesizers.

Highlights

  • The ability to synchronize multiple events with ever improving precision has allowed human beings to accomplish increasingly complex tasks

  • We introduce a simple all-inline variation of a balanced optical cross-correlator (BOC) that allows to measure the arrival time difference (ATD), over the full Nyquist bandwidth, with increased common-mode rejection and long-term stability

  • The setup precision is verified with an out-of-loop measurement to be less than 80 as residual jitter paving the way for highly demanding applications such as parametric waveform synthesizers

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Summary

Introduction

The ability to synchronize multiple events with ever improving precision has allowed human beings to accomplish increasingly complex tasks. We introduce a novel inline BOC scheme, dubbed RAM (relative arrival-time measurement), developed to synchronize high-energy ultrashort pulses at kHz (or lower) repetition rate with high accuracy. This scheme is designed to minimize the influence of beam-pointing and intensity fluctuations/drifts present in ultrabroadband laser sources such as OP(CP)As on the measured ATD. All those features constitute the first step for even higher precision ATD control of the different outputs of a 3-channel parametric waveform synthesizer [14]

RAM method
RAM method: detection and processing
ATD measurement using the RAM scheme
ATD stabilization and out-of-loop validation of locking performance
Findings
Conclusions
Full Text
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