High-density via RRAM cell with multi-level setting by current compliance circuits

Abstract

In this work, multi-level storage in the via RRAM has been first time reported and demonstrated with the standard FinFET CMOS logic process. Multi-level states in via RRAM are achieved by controlling the current compliance during set operations. The new current compliance setting circuits are proposed to ensure stable resistance control when one considers cells under the process variation effect. The improved stability and tightened distributions on its multi-level states on via RRAM have been successfully demonstrated.