Hierarchical timing-driven floorplanning and place and route using a timing budgeter

Abstract

This paper describes a method to design large high-performance circuits using a tool called the Timing Budgeter to perform timing-driven hierarchical design. Present approaches to hierarchical timing-driven design are inadequate. Hierarchical design with considerations of timing typically requires the help of a timing expert to allocate and reallocate budgets of timing constraints to the blocks of a hierarchical design, as the design progresses. This approach is characterized by non-optimal timing budget allocations and tedious manual intervention. Another proposed method requires expensive iterations between physical layout and timing analysis. The hierarchical timing-driven methodology using the timing budgeter provides an automated method to allocate and reallocate high quality budgets to blocks of a hierarchical design. The methodology vastly improves the chance of satisfying the timing constraints of a large hierarchical design in one iteration of physical layout and timing analysis.