Abstract
The physical and electrical properties of dielectric layers deposited by atomic layer deposition (ALD) are reported. The precursor chemistries used for deposition were for and for Two processes with precursor pulse ratios of -rich”) and -rich”) are investigated. Measurements with X-ray photoelectron spectroscopy and channeling Rutherford backscattering spectrometry show that these processes result in layers with ratios of 0.56 and 0.34-0.37, respectively. X-ray diffraction measurements showed formation of a cubic phase in -rich layers starting at 850°C. In -rich layers, no crystallization was detected up to 1100°C. Metal oxide semiconductor (MOS) capacitors with polysilicon electrodes were used for electrical characterization. The k-value of the -rich layers was found to be 4.8-5.4 and that of the -rich layers 12.5-15.1, both with an experimental error of 10%. The leakage currents of both types of layers were comparable to reference data and increased with polysilicon activation anneal. A high-resolution transmission electron microscopy study revealed phase segregation in thick -rich layers. In -rich layers, the phase segregation was less clear, but upon annealing, composition variations at the interfaces were detected. Given the experimental errors, no impact of phase segregation on the k-values of both types of layers could be detected. It is concluded that postdeposition annealing of layers for application as gate dielectrics applications in advanced complementary MOS technologies is essential to optimize stoichiometry and reduce leakage currents. © 2004 The Electrochemical Society. All rights reserved.
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