Abstract

This article presents a systematic study on the analog and radio-frequency (RF) performance of type-II staggered heterostructure ${p}$ -channel tunnel field-effect transistors ( ${p}$ TFETs) with Ge (Germanium) channel and different compound semiconductor source. In order to study the figure-of-merits (FOMs) of analog and RF performances, various Ge-channel ${p}$ TFETs are designed with Ge, GaAsP, SiGe, and InAlAs sources. The numerical simulation data show an improvement in the FOMs of analog performance such as drain current ( $I_{ds}$ ), transconductance ( $g_{m}$ ), transconductance-generation-factor ( $g_{m}$ /I $_{ds}$ ), and intrinsic gain ( $g_{m}$ $R_{o}$ ) of the devices with compound semiconductor source compared to Ge-source ${p}$ TFET devices. Similarly, an improvement in the RF FOMs such as gate-to-source ( $\text{C}_{gs}$ ) and gate-to-drain ( $\text{C}_{gd}$ ) capacitances, maximum frequency of oscillation ( $f_{MAX}$ ), and cutoff frequency ( $f_{T}$ ) is observed for the devices with GaAsP, SiGe, and InAlAs source compared to Ge-source ${p}$ TFETs. The simulation results also show that the common-source amplifiers, designed with Ge-heterostructure ${p}$ TFETs, exhibit a significant enhancement in gain and Gain-Bandwidth product of the circuit.

Highlights

  • As the CMOS technology scales down to its ultimate scaling limit of metal-oxide-semiconductor field-effect transistor (MOSFET) miniaturization, the power dissipation and chip area have become critical issues [1], [2]

  • This is because at the same biasing condition, the tunneling barrier for GaAsP, SiGe, and InAlAs source devices is lower compared to the all GepTFETs as observed from the energy band diagrams of the corresponding devices shown in inset of Fig. 4 obtained at Vgs = −1.1 V and Vds = −0.8 V

  • This article presents a comparative analysis of analog and RF FOMs of the Ge-body p-channel tunnel field-effect transistors (pTFETs) with different compound semiconductors as source materials and the conventional all

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Summary

Introduction

As the CMOS technology scales down to its ultimate scaling limit of metal-oxide-semiconductor field-effect transistor (MOSFET) miniaturization, the power dissipation and chip area have become critical issues [1], [2]. The scaled MOSFET devices are, constrained by the theoretical limit of subthreshold swing (SS) of 60 mV/decade of current at room temperature [4]. This limitation of SS in the conventional MOSFETs causes a significant increase in the off-state leakage current (Ioff ) and power dissipation [2]. Surmount the limitations of MOSFETs in the generation technology node, the tunnel field-effect transistors, referred to as the “TFETs,” show a great potential to replace the conventional MOSFETs due to their carrier injection mechanism by inter-band or band-to-band tunneling (BTBT) in contrast to the thermal injection of carriers in MOSFETs [1], [5].

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