Abstract
In this paper, an extensive study on the intermodulation distortion and the linearity parameters of a double gate Tunnel FET (DG-TFET) has been done. The device is analyzed for three source materials i.e. Silicon, Germanium and Indium Arsenide, that results in formation of hetero-junction at the source and channel junction, using the SILVACO ATLAS device simulator. The simulation results reveal that the DG-TEFT design exhibits a significant enhancement in the device linearity and intermodulation distortion performance in terms of the various figure-of-merit metrics such as VIP2, VIP3, IIP3, IMD3 and the higher order transconductance coefficients gm1, gm2, and gm3 with the amalgamation of Ge as a source material in comparison with Si and InAs. The superior linearity and intermodulation distortion offered by Ge source DG-TFET thereby strengthen its efficacy for the designing of RFIC.
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