Abstract

Advancements in miniaturisation and new capabilities of implantable devices impose a need for the development of compact, hermetic, and CMOS-compatible micro packaging methods. Gold-tin-based eutectic bonding presents the potential for achieving low-footprint seals with low permeability to moisture at process temperatures below 350 ∘C. This work describes a method for the deposition of Au:Sn eutectic alloy frames by sequential electroplating from commercially available solutions. Frames were bonded on the chip-level in the process of eutectic bonding. Bond quality was characterised through shear force measurements, scanning electron microscopy, visual inspection, and immersion tests. Characterisation of seals geometry, solder thickness, and bonding process parameters was evaluated, along with toxicity assessment of bonding layers to the human fibroblast cells. With a successful bond yield of over 70% and no cytotoxic effect, Au:Sn eutectic bonding appears as a suitable method for the protection of integrated circuitry in implantable applications.

Highlights

  • One of the most critical design challenges in the growing sector of miniaturised, smart implantable devices is providing reliable packaging of a small footprint and good hermeticity. [1, 2]

  • 12% of samples exhibited shear strength values below the minimum as described by MIL-STD-883G military standard for die-attach calculated per total bond area [33], reducing the total yield of bonding process across the range of parameters tested to approximately 64%

  • A method for creating solid and hermetic seals using AuSn alloy sequentially electroplated from commercially available solutions is presented

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Summary

Introduction

One of the most critical design challenges in the growing sector of miniaturised, smart implantable devices is providing reliable packaging of a small footprint and good hermeticity. [1, 2]. The majority of implants were packaged by encasing entire systems in metal or glass cases or by using thick outer coatings, mainly made of medical-grade silicones [2, 6, 7] These solutions either do not provide an appropriate level of hermeticity or Hermetic chip-scale packaging using Au:Sn eutectic bonding for implantable devices 2 are too large and not fit for wireless systems with integrated electronics. Approaches of using thin, ALD-deposited high-K ceramic materials such as Hafnium Dioxide and multilayers of Silicon Dioxide with Hafnium Dioxide as a protective coating on neural implants have emerged [11, 12] They hold the promise of thin, stable coatings; they would not solve the issue of mechanical stability of chips stressed by the tissue nor integration difficulty of more advanced microelectrode designs

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