Heat transfer study of 3D packaging structure with superconducting TSV for practical-scale quantum annealing machines

Abstract

To avoid the interconnect crowding in a planar structure, three-dimensional (3D) integrated technologies are necessary for realizing practical large-scale quantum annealing (QA) machines. We studied the heat transfer of a 3D packaging structure with superconducting through-silicon via for large-scale QA machines by finite element method simulation. The heat transfer becomes less efficient in the stacked structure. A high temperature of 57.0 mK is observed for the qubit chip, which degrades the quantum coherence of the qubit chip. We propose a heat transfer optimization method by increasing the number of bumps under the active interposer. Furthermore, by shortening the distance to the heat sink, the maximum temperature of the qubit chip is reduced to 18.1 mK. Our proposed heat transfer optimization methods are useful to provide a cryogenic temperature for stable qubit chip operation in a 3D packaging structure to realize practical-scale superconducting QA machines.