Hardware-efficient parallel structures for linear-phase FIR digital filter

Abstract

Based on fast convolution algorithm, this paper proposes improved parallel FIR filter structures for linear-phase FIR filters where the number of taps is a multiple of parallelism. The proposed parallel FIR structures not only use fast convolution algorithm to reduce the number of subfilter, but also exploit the symmetric (or antisymmetric) coefficients of linear-phase FIR filter to reduce half the number of multiplications in subfilter section at the expense of additional adders in preprocessing and postprocessing blocks. The proposed parallel FIR structures save a large amount of hardware cost for symmetric (or antisymmetric) coefficients from the reported FFA parallel FIR filter structures, especially when the length of the filter is large, e.g., the proposed 4-parallel FIR filter structure has eight subfilter blocks in total and four subfilter blocks contain symmetric coefficients, whereas the improved FFA structure has nine subfilter blocks in total and four contain symmetric coefficients. Specifically, for a 4-parallel 576-tap filter, the proposed design saves 144 multipliers (14.3%), 135 adders (10.2%) and 143 delay elements (11.1%).