Abstract
Chapter is devoted to hardware reduction based on using many directions of input memory functions in Moore FSMs. Firstly, the hardware reduction methods are proposed for the two-directional Moore FSMs. They are based on the special state assignment allowing the decreasing for the number of literals in sum-of-products representing input memory functions. Next, the design methods are proposed for three-directional Moore FSMs. It is shown that the number of directions can be increased. It leads to simplifying the input memory functions in comparison with the single-directional models. The last part of the Chapter is devoted to combining the replacement of logical conditions with many directions of state codes.
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