Hardware Design of Multichannel Video Acquisition System Based on FPGA

Abstract

A hardware design of multi-channel video acquisition system is designed, we propose system based on FPGA Cyclone V chip, The A/D conversion of analog video signal is accomplished through high-speed parallel AD chip LTC2202 of LINEAR Company. In the process of image data acquisition, SDRAM is used for data caching in image processing. From capacity and reading and writing speed analysis, 2 pieces of MICRON Company’s 32 bit wide MT48LC2M32B2B5 are selected, and the capacity is 64Mb, The Cameralink interface is selected as the interface between FPGA and image data transmission of external system. There is reserved communication with external control signals, sending control signals by TI Company DS90LV047. The system collects the image data from the front end through the A/D, caches the SDRAM and outputs the image through Cameralink to achieve the high speed and high efficiency of the data transmission. The hardware realizes the data acquisition and transmission of the multi-channel target image.