Abstract
The paper presents the realtime implementation of a digital signal processing and image recovery pipeline of weather satellites downlink data based on the Xilinx Zynq SoC of the PYNQ-Z2 board. It is used for the illustration of parallel hardware acceleration techniques at the weather satellite university ground station. The high-performance programmable logic expand the capabilities of the basic computational methods and is applied for satellite data processing. The access architecture to programmable logic elements for their virtual reconfiguration is described. The design of digital polyphase filtering, symbol synchronization, and data decoding modules is reflected. A phase-locked loop with a simplified approximation to the iterative phase shift calculation is discussed. The recovered high-resolution image of the NOAA-18 satellite demonstrates the effectiveness of a hardware-accelerated digital signal processing system.
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