Abstract

The ITRS requires the integration of dielectric materials with effective dielectric constant (k) lower than 2.8. This is achieved using porous SiOCH. Unfortunately during integration in the devices, damages are introduced in the low-k layer by CMP. The impact of these damages on the microstructure and the electronic properties are studied using HAADF imaging and Valence Electron Energy Loss Spectroscopy in TEM environment. Results are compared to low-k capped with an etch stop layer.

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