Grid-Based Redistribution Layers Within 3-D Power Networks

Abstract

Although CMOS scaling has slowed, the demand for greater performance and heterogeneous integration has only increased. Three-dimensional integrated circuits (ICs), which exploit the vertical dimension, extend scaling while providing a platform for heterogeneous integration and greater performance. The redistribution layer (RDL) is a critical component in the power delivery system within heterogeneous 3-D systems, where each layer is individually designed, optimized, and fabricated. A circuit model of the power/ground (P/G) RDL is described considering different through-silicon-via (TSV) fabrication methods and stacking topologies. A grid-based RDL is proposed to support higher current and fewer P/G TSVs. By utilizing a grid-based RDL, five times more current is supported without a significant voltage drop as compared with a direct point-to-point (P2P) RDL. The grid-based RDL also supports a nonuniform TSV distribution, alleviating area constraints. In one case study, a grid-based RDL with 20 unevenly distributed TSVs exhibits a 9.8% lower voltage drop than a P2P RDL with 50 uniformly distributed TSVs.