Graphene for CMOS and Beyond CMOS Applications

Abstract

Owing in part to complementary metal–oxide–semiconductor (CMOS) scaling issues, the semiconductor industry is placing an increased emphasis on emerging materials and devices that may provide a solution beyond the 22-nm node. Single and few layers of carbon sheets (graphene) have been fabricated by a variety of techniques including mechanical exfoliation and chemical vapor deposition, and field-effect devices have been demonstrated with room temperature field-effect mobilities close to 10 000 cm <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX"> $^{2}$</tex></formula> /Vs. But since graphene is a gapless semiconductor, these transistors have high off-state leakage and nonsaturating drive currents. This is problematic for digital logic, but is acceptable for analog device applications such as low-noise amplifiers and radio-frequency (RF)/millimeter-wave field-effect transistors (FETs). The remarkable transport physics of graphene due to its linear bandstructure have led to novel beyond CMOS logic devices as well, such as “pseudospin” devices.