Abstract
A CMOS (complementary metal oxide semiconductor) low noise amplifier (LNA) suitable for radio frequency (RF) wireless applications is investigated in this study. A fully integrated 2.38-GHz CMOS LNA is implemented by using 0.25μm CMOS technology with a 2.5V power supply. The main simulation points are input/output impedance matching, isolation, power gain, linearity and power consumption. Through adjusting the component values of the LNA, the optimization can be determined. Simulation results show that the LNA is characterized by a power gain of 20dB, a noise figure of 1.5dB, an IP3 of -18dBm, a power dissipation of 18.5mW, and well-matched input/output.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
