Graphene as Charge Storage Layer in Floating Gate Flash Memory with Highk Tunnel Barrier Engineering

Abstract

This study aims to investigate the memory performances of graphene as a charge storage layer in the floating gate with the different type of high-k materials such as silicon nitride (Si 3 N 4 ), aluminium oxide (Al 2 O 3 ), hafnium dioxide (HfO 2 ) and zirconium oxide (ZrO 2 ) using Silvaco ATLAS TCAD Tools. The simulation work initially is to validate the experimental work with the simulation data and then determine the performance of flash memory cell with the different type of high-k materials in term of memory window, program and erase characteristics and data retention. The memory window for flash memory cell without high-k material is 15.4V while for the memory window of 1/7nm of silicon dioxide (SiO 2 )/high-k material of four high-k materials for SiO 2 /Si 3 N 4 , SiO 2 /Al 2 O 3 , SiO 2 /HfO 2 and SiO 2 /ZrO 2 tunnel barrier are 23.0V, 20.0V, 25.4V and 26.0 respectively at the same P/E voltage of ±20V programming and erasing voltage. The data retention of four high-k materials shows better data retention from the conventional SiO 2 . The SiO 2 /Si 3 N 4 , SiO 2 /HfO 2 and SiO 2 /ZrO 2 tunnel barrier are retained by 56% (12.88V), 47% (11.94V) and 33% (8.58V) as compared to conventional SiO 2 are retained by 75% (11.6V) after 10 years of −1/1V gate stress. SiO 2 /Al 2 O 3 tunnel barrier with thickness 1/7nm shows an excellent result among others with 83% (16.60V) data are retained after 10 years of extrapolation.