Ge-on-insulator wafer with ultralow defect density fabricated by direct condensation of SiGe-on-insulator structure

Abstract

This letter presents an improved method to fabricate Ge-on-insulator (GOI) wafer with extremely low defect density. In the traditional Ge condensation approach, the Si/SiGe/SOI structure is utilized as the starting substrate, and the misfit dislocations formed at the SiGe/SOI interface will evolve into the threading dislocations during the Ge condensation process, thus resulting in high density of defects residual in the final GOI wafer. In the present study, the defect evolution process is precluded via the direct condensation of SiGe-on-insulator (SGOI), which is fabricated by ion-cut technique prior to the Ge condensation. Compared to the traditional Ge condensation approach, the threading dislocation density (TDD) of GOI obtained by the improved method is significantly reduced from 1×107cm−2 to 7×105cm−2. In addition, a considerable enhancement (56%) of the hole mobility for the modified Ge condensation approach is achieved. Our modification may bring the revival of the Ge condensation technique in GOI wafer manufacturing and enable the potential application in post-silicon era.