Abstract
A new approach for the evolutionary design of combinational logic circuits using Genetic Algorithm and 2-1 multiplexers is presented. Binary multiplexer is the only design unit used. Repeated use of the same element reduces the manufacturing cost which is of prime importance in VLSI design. Any Boolean function can be realized using 2-1 multiplexers with this method. The performance of the circuits evolved was compared with standard implementation technique. Power, area, and delay involved were analyzed using Synopsys design compiler. With the proposed technique, the number of modules needed is reduced significantly, thereby reducing the power, area, cost and delay.
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