Evolutionary repair for evolutionary design of combinational logic circuits

Abstract

Evolutionary algorithms have been adopted to design logic circuits for many years. However, it takes too much time for evolutionary algorithms to generate circuits directly. Recently, the repair technique has been introduced into evolutionary design of the circuit to significantly decrease the time cost. And yet, the repair technique costs a lot of gate resource. In this paper, the evolutionary repair for evolutionary design of the combinational circuit is proposed, which generates the repair circuits with an evolutionary algorithm. The evolutionary repair could reduce the gate resource cost and does not spend much more time. The evolutionary repair is merged into the traditional evolutionary algorithm to form a novel evolutionary design algorithm, i.e. the erEDA. The experimental results demonstrate that the erEDA could balance the time cost and the gate resource consumption.