Abstract
Gate underlap structure can be utilized to improve the immunity to short channel effects in MOSFET devices. In this work, gate underlap design scheme in cylindrical gate-all-around MOSFETs is explored based on an analytical model. This model takes into account the fringing field from gate electrode to underlap regions based on conformal mapping and a channel length transformation method. By solving Poisson equations in the underlap and channel regions and matching the boundary conditions, this model reproduces the channel potential profile in subthreshold operation region. Both symmetric and asymmetric underlap structures are covered. The developed model is verified extensively with TCAD simulations. A gate underlap design scheme is then provided based on this analytical model.
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