Abstract
Because SiC MOSFET-based zero-voltage switching (ZVS) power converter circuits provide high-speed switching, high power density and high efficiency can be achieved. However, an undesired negative spike is formed at the gate-source voltage owing to the crosstalk phenomenon in leg structures, such as half-bridge switch configurations, during high-speed switching. Additionally, ringing voltage occurs owing to resonance between the snubber capacitor and the common source inductance of the SiC MOSFET. Because SiC MOSFETs have a lower gate voltage rating than conventional Si devices, it is essential to reduce the negative spike and ringing voltages to ensure reliability. In this paper, the gate driver circuit is proposed for reducing the negative spike and ringing voltages of the gate-source in ZVS circuits. Because the proposed gate driver circuit provides an effective impedance path for each section through an active switch, a stable driving voltage range of the gate-source can be achieved. To verify the proposed gate driver circuit, an accurate simulation model of the 3-pin SiC MOSFET package is proposed, and the validity of the proposed model is verified through comparison of the simulated waveforms with experimental waveforms. The performance of the proposed gate driver circuit is verified through PSpice simulation.
Highlights
Power converters are key components in various industrial applications, such as renewable energy, electric transportation, and aerospace systems
We propose a new gate driver circuit for a SiC MOSFET-based zero-voltage switching (ZVS) circuit
It can reduce both the negative spike voltage caused by crosstalk and the ringing voltage caused by the resonance of the snubber capacitor and common source inductance (CSI)
Summary
Power converters are key components in various industrial applications, such as renewable energy, electric transportation, and aerospace systems. Because the active Miller clamp technique is operated in the dead time period after turn-off, it does not affect the switching performance It provides a low-impedance path, and the positive spike voltage formed at the gate-source can be reduced. We propose a new gate driver circuit for a SiC MOSFET-based ZVS circuit It can reduce both the negative spike voltage caused by crosstalk and the ringing voltage. A. ANALYZING THE NEGATIVE SPIKE VOLTAGE OF GATE-SOURCE Figure 2 shows the operation waveform during the dead time period from the turn-off of the high switch to the section in which the body diode of the low-switch conducts. Because of the current flowing through the gate loop, a negative spike starts to form in VGS_L and VCgs, in proportion to the voltage drops of Rg_L and Rg(in), as shown in the following equations:. A detailed analysis of these relationships is provided in the following
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