Abstract
GaN high voltage diodes with high-k dielectrics passivation underneath the filed plate are demonstrated. Simulation results at reverse voltage of 1000V showed that the maximum electric field near the mesa-etched pn junction edges covered with film of dielectric constant k value of 10 was reduced to 2.3MV/cm from 3.2MV/cm (SiO2(k=3.9)). Mesa structures of pn junction diodes were fabricated by ICP dry etching, and mixed oxide of SiO2 & CeO2 dielectric film with k value of about 12.3 was deposited by CVD. I-V characteristics of the diode with a field plate showed the breakdown voltage above 2000 V with an increased avalanche current. This means that the electric field reduces at the periphery of the mesa etched pn junction and was uniformly formed across the whole pn junction. It is clear that high-k dielectric film passivation and filed plate termination are essential techniques for GaN power devices.
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