GaN power converter and high-side IC substrate issues on Si, p-n junction, or SOI

Abstract

The lateral GaN power semiconductor technology enables monolithic integration of complete power converter topologies such as half-bridges, multi-phase and multi-level converters. Fabrication on Si substrates enables low-cost and mass production. However, the operation of monolithic GaN power converters on a common conductive silicon (Si) substrate is limited compared to discrete GaN HEMTs, especially at high-voltage operation, due to substrate-biasing effects such as back-gated or trap-related static and dynamic on-resistance increase, and changed effective device capacitances. To circumvent the Si substrate related effects but still using a low-cost large-diameter Si substrate, this paper reviews isolation approaches for GaN ICs such as Si p-n junction isolation or floating Si substrates (GaN-on-Si) and buried oxide isolation using Silicon-on-Insulator substrates (GaN-on-SOI). Published GaN power converter ICs are reviewed. The effect of the isolation approaches on increased output and input transistor capacitances, influencing the switching behavior and switching loss, is calculated and compared for different voltage classes (below 100 V to 600 V-class). Finally, design guidelines for local substrate termination using the Si-based isolation approaches are discussed exemplary for a monolithic half-bridge with driver circuit. Monolithic GaN power converter integration combined with functional integration will result in a new class of advanced power converter ICs, and enable efficient, compact and low-cost power conversion applications.