GaAs high‐k dielectric metal‐insulator‐semiconductor structure having silicon interface control layer

Abstract

AbstractA pinning‐free high‐k dielectric metal‐insulator‐semiconductor (MIS) gate stack was realized on GaAs surfaces by using a Si interface control layer (Si ICL). The MIS structure has a SiNx/Si ICL ultrathin double layer inserted between GaAs and HfO2. Si ICL was grown epitaxially on a Ga‐stabilized GaAs surface by molecular beam epitaxy (MBE). The ultrathin SiNx buffer film was formed by in situ partial nitridation of Si ICL in the MBE chamber. An X‐ray photoelectron spectroscopy (XPS) analysis indicated that the ultrathin SiNx/Si ICL structure is chemically stable against air‐exposure, preventing the Si ICL/GaAs hetero‐interface from oxidation, although the ultrathin SiNx film itself partially turns into SiOxNy. Using this feature, a high‐k MIS capacitor was formed by ex situ deposition of HfO2 on the SiOxNy/Si ICL/GaAs structure. The capacitance‐voltage (C‐V) analysis of the high‐k MIS sample after rapid thermal annealing at 500 °C for 30 sec indicated that the MIS interface is completely free from Fermi level pinning with a minimum interface state density below 1011 cm–2eV–1. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)