Fuzzy-Clustering-Based Circular Topological Via Minimization in PCB Designs

Abstract

It is necessary for reliability and yield to minimize the number of used vias on nets in printed circuit board (PCB) designs. To our knowledge, the proposed fuzzy-clustering-based algorithm is the first work for a general routing region with multiple-pin nets in k -layer circular topological via minimization ( k -CTVM). In this article, given the topological connections in a set of routing nets and a set of k available layers in a routing plane, first, all the multipin nets can be transformed into a set of two-pin nets by introducing a set of preassigned vias onto the branch points on multipin nets and a conflict graph can be constructed for a final set of two-pin nets. Furthermore, the probabilistic similarity between two connected vertices using the same color can be computed for the constrained vertex-coloring problem with k colors in a conflict graph. Next, based on the definition of the clustering distance between two connected vertices in a conflict graph, fuzzy graph clustering can be developed to obtain a fuzzy matrix on k clusters. Finally, all the given nets can be assigned onto the k available layers by introducing a set of necessary vias on two-pin nets and eliminating the unnecessary preassigned vias on multipin nets. Compared with the combination of Cong's algorithm and an iterative net postassignment, NetInsertion1 , in the k -CTVM problem, the experimental results show that our proposed fuzzy-clustering- based algorithm can use less CPU time to reduce 57.3% of the number of the total used vias for eight tested PCB designs. Compared with the combination of Yan's algorithm and an iterative net postassignment, NetInsertion2 , in the k -CTVM problem, the experimental results show that our proposed fuzzy-clustering-based algorithm can reduce 34.0% of the number of the total used vias for eight tested PCB designs.