Fuzzy time point compatibility reasoning for microprocessor systems

Abstract

Time range reasoning and fuzzy time point reasoning have been proposed and implemented for microprocessor systems diagnosis. These approaches provide effective temporal constraint reasoning based on two primitive mechanisms: the constraint satisfaction and the constraint propagation. Through the reasoning process, the occurrence time of a microprocessor system event is determined with respect to a previously occurred reference event. In the domain of microprocessor systems, however, the two primitive mechanisms are insufficient in some cases. In some situations, a timing parameter of a system component imposes a temporal constraint on an event with respect to a future event which has an unknown occurrence time at that instance. Thus, it is very difficult for an event to make reference to that future event. In particular, for the read cycle of the MC68000 microprocessor, the DTACK signal must be asserted at least t/sub ASI/ before the falling edge of the CPU clock state S/sub 5/. As the clock is a well defined periodical signal, the parameter t/sub ASI/ does not directly affect the occurrence time of S/sub 5/. In fact, t/sub ASI/ imposes a compatibility constraint on the event S/sub 5/. If the constraint is not satisfied, either an event or a sequence of events might be initiated to resolve the constraint violation, or the operation fails. In our case. Wait states are Hence, a supplemental reasoning mechanism is desired which ensures this kind of temporal constraint compatibility.