Abstract
Abstract A diagnostic system for microprocessor systems design is being designed and developed. In microprocessor systems diagnosis and design, temporal reasoning about event changes occurring at imprecisely knon time instants is an important issue. The concept of a time range has been proposed to capture the notion of time imprecision in event occurrence. According to this concept, efficient temporal reasoning techniques for constraint satisfaction and propagation of time ranges have been developed for the embedding of domain knowledge in a deep-level constraint model. The imprecision in these events contributes to a certain degree of uncertainty about the correctness of a microprocessor system operation. The proposed system performs worst-case timing analysis. In particular, for the asynchronous bus operation of the MC68000 microprocessor, the sequence of events during a read cycle is traced through an inference process to determine whether any constraint in the model is violated. Satisfactory results have been obtained in a practical implementation of the system using the CLIPS expert system shell.
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