Abstract
The Double Gate silicon (DG) MOSFET with extremely short-channel length has the appropriate features to constitute the devices for nanoscale circuit design. To develop a physical model for extremely scaled DG MOSFETs, the electron mobility distribution throughout the channel must be accurately determined under the application of drain and gate voltages. However, the modeling of the transport behavior for the nanoscale structures requires the use of overkill methods and models in terms of complexity and computation time (self-consistent, quantum computations,..). Therefore, new methods and techniques are required to overcome these constraints. In this work, a new approach based on the fuzzy logic computation is proposed to model the electron mobility behavior for nanoscale DG MOSFETs. The proposed approach can be implemented into devices simulator to study the nanoscale CMOS-based circuits.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: IOP Conference Series: Materials Science and Engineering
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.