Functional Verification of Memory Circuits from Mask Artwork Data

Abstract

The timing simulator MACTIS was successfully applied to functional verification of MOS memory circuits from mask artwork data. The circuit description is extracted automatically from artwork data by the mask analysis program. Combining the macromodel technique and the code generation scheme, the timing simulation can be performed cost-effectively. MACTIS can handle circuits with analog features also, including bootstrapping effects, which cannot be done by logic and switch level simulators.