Functional Parallelism in VLSI Systems and Computations

Abstract

The effectiveness of very large scale integration (VLSI) in reducing the incremental cost per unit of performance of a variety of flexible system functions can be significantly enhanced by employing a high degree of functional parallelism with serialized data-flow and control. Both Functional Parallelism (the parallel use of an array of high density, low cost, lower performance devices to obtain a high performance function) and Bit-Serialized Arithmetic (the use of single bit-stream operations to perform elementary arithmetic functions) have been factored into VLSI systems and computations to permit advantageous use of MOS solid-state technologies as well as graceful transitions of processor implementation from one scale of large scale integration to the next. Some of the major considerations linking form to function are noted here with examples illustrating the impact of functional parallelism and serialized arithmetic.