Abstract
We report fully solution-processed thin film transistors and PMOS inverters fabricated on glass substrates using single-walled carbon nanotubes (SWCNTs) as active semiconducting material. All the electrodes (gate, source, and drain) were inkjet-printed using silver (Ag) as conductive ink. Spin coated poly-4-vinylphenol dielectric was optimized in terms of thickness and heating conditions for solution-processed SWCNTs thin film transistors to achieve a mobility equal to 0.81 cm2 V−1s−1. We will show that, hole traps at the dielectric-semiconductor interface are responsible for the hysteresis in the transfer curve, and controlled by the different sweep rate of the gate field. Drain-current transients under different bias conditions were studied and the increase in current occurs due to slow polarizations of residual dipolar groups in the dielectric. The adopted technology has been exploited to fabricate a PMOS inverter and studied for high gain and noise margin values at the supply voltage, V DD = −40 V.
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