Abstract

This paper presents an all-digital Capacitive Sensor Interface (CSI) implemented in 0.18 \(\upmu \)m CMOS technology. The circuit consists of two blocks: a Capacitance to Time Converter (CTC) and a Time to Digital Converter (TDC). The CTC block uses a Capacitive Controlled Oscillator (CCO) in addition to a Calibration Unit with a dummy capacitor bank for estimating the capacitance value. The TDC consists of a ring delay line and an edge combiner. The CTC generates a pulse width according to the sensing capacitance (\(C_{sense}\)) and passes the generated pulse to the TDC that provides the coarse and fine counts according to the pulse width. The range of the \(C_{sense}\) is varied from 0.1 pF to 36 pF that can cover a wide range of applications. Energy efficiency of this circuit is 53.28 pJ and average power consumption is 28.08 nW with 5.72 bit accuracy at an operating voltage of 1.8 V at 10 Hz sampling frequency and can measure a minimum change in capacitance of 298.92 fF. At a lower voltage of 0.3 V, the CSI consumes 1.26 nW with 7.81 bit accuracy for the same sampling frequency.

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