Abstract

A frequency-reconfigurable SP4T switch is presented, in which <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ON}} \times {C}_{\text {OFF}}$ </tex-math></inline-formula> characteristics of switch transistors are enhanced with plaid metal transistors and forward body biasing. Plaid metal transistors (PMT) with forward body bias (FBB) are used for all of the transistors to enhance the FoM. The plaid patterned metal accesses of a transistor for the source and drain decrease the extrinsic resistance and capacitance. FBB increases the overdrive voltage of a transistor and decreases the on-resistance. The SP4T switch includes main switch matrices that route an input signal to four-outputs, a switched inductor (SI) network, and a mode-selection switch. The SI network connected through the mode-selection switch resonates out the off-capacitances of the main switch matrices at RF in the RF mode. The SP4T switch operates without the SI network in DC mode. The SP4T switch is implemented in a 28-nm FDSOI CMOS process. The core area occupies 0.2 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The switch shows less than 2 dB insertion loss from DC to 4.4 GHz in the DC mode and from 4.4 to 5.3 GHz in the RF mode, where isolations are more than 16.8 dB and 18 dB, respectively.

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