Framed Repetition Code for High Speed Chip-to-Chip Communication in Multi-Drop Interfaces

Abstract

In today's chip-to-chip communication over multi-drop bus (MDB) interfaces, the trend of high-speed transmission has led to ever growing bandwidth requirements. An MDB channel is frequency-selective with deep notches at low frequencies, namely f<sub>notch</sub>, which result from strong reflections at an MDB interface. In conventional chip-to-chip communication systems, the signal power is concentrated in the main lobe of the power spectral density (PSD), i.e., within |f| < f<sub>s</sub><sup>NRZ</sup>, where f<sub>s</sub><sup>NRZ</sup> = 1/T, is defined as the signal bandwidth. Limited by the complexity on the analog equalizer, f<sub>s</sub><sup>NRZ</sup> < f<sub>notch</sub> should hold to avoid strong distortions of the transmit signal. To cope with this problem, conventional signal processing methods, such as digital equalization and error control coding, are undesired in this application scenario due to extremely tight power and latency constraints. A spectrum shaping scheme named framed repetition code was proposed for the MDB channel of a single strong reflection. It aims at matching the signal spectrum to the channel magnitude response |H(f)|. However, a solution for multi-reflection channels, which is more often encountered in MDB interfaces, has not yet been investigated. This paper proposes a novel code construction algorithm for multi-reflection MDB channels. The algorithm is designed based on the root mean square delay spread. Using the constructed framed repetition codes, the degradation due to the channel filtering is reduced significantly. Simulations reveal a good performance. The data rate in multi-reflection MDB channels is increased by a factor of 2.6 without using any equalization compared to the conventional non-return-to-zero (NRZ) transmission scheme.