Abstract
Cracking of multilayer ceramic chips due to mechanical and thermal stresses during surface mounting is a major problem. Two types of tests were performed to study the susceptibility of chips for thermal shock cracking. In one test, chips were immersed in molten solder at different temperatures and, after cooling, chips were examined for visible cracks. In another test, chips were mounted on a printed circuit board and, then, wave soldered to simulate the actual usage conditions. After the soldering process, chips were exposed to load humidity conditions and, then, tested for insuiation resistance. Cracked chips from both tests were analyzed by fractographic methods to determine the source of failure. Causes of the defects leading to fracture and their relationship to the processing of multilayer capacitors are discussed. The relative advantages and disadvantages of the two thermal shock test methods in evaluating the integrity of the chips are presented. [Key words: capacitors, multilayer, thermal shock, cracks, fractography.]
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