Abstract
Fiber-optic sensor arrays are always organized utilizing hybrid time division multiplexing (TDM)/wavelength division multiplexing (WDM) techniques to share some common optical components and reduce the cost. Modern sensor arrays can support up to several thousands of sensors by employing distributed amplification technique. They generate huge amount of data and pose other big challenge on the interrogation controller of the sensor system, such as long demodulation time and heavy computational burden. Aiming to solve these problems, we present a complete design of the interrogation controller based on a field programmable gate array (FPGA) by lending its powerful parallelism potential. The interrogation controller adopts a hardware-implementation-friendly modulation method called the rectangular-pulse binary (RPB) modulation. The functional modules in the FPGA are properly organized according to the working principle of the RPB method and carefully designed by optimizing their pipeline architecture to minimize the output latency, which is essential to increase the maximal supportable number of sensors. By analyzing the resource budget and the actual resource consumption result, it demonstrates that the controller can support up to 1000+ sensors in real time by using a single middle-end Stratix III FPGA chip. A 8-sensors array prototype is constructed to validate its functionality. This work can greatly reduce the cost of the sensor system and push it closer to the practical applications.
Published Version
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