FPGA implementation of feature detection and matching using ORB

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Oriented FAST and Rotated BRIEF (ORB) is becoming the method of choice in real-time feature matching applications by offering performances comparable to other state-of-the-art descriptors at a fraction of the runtime and memory requirements. These characteristics have prompted multiple researchers to propose FPGA-based accelerators that allow for a significant increase in throughput compared to general-purpose processors. This increase is, however, achieved at the expense of the descriptor’s robustness as several approximations are necessary to map the algorithm efficiently into hardware which negatively affects its invariance. In this paper, we introduce an FPGA architecture capable of extracting ORB descriptors at high throughput with minimal impact to their invariance. Rotation of sample point coordinates is bypassed entirely, and methods for the accurate computation of the moments and descriptor generation in a single clock cycle are described. Moreover, a feature matching algorithm based on the cross-check criterion is proposed and implemented in hardware. The architecture achieved a throughput of 94 MPix/s using a 100 MHz clock while producing an almost identical performance compared to the reference implementation.