FPGA Implementation of an ECC Processor Using Edwards Curves and DFT Modular Multiplication

Abstract

In this work, an elliptic curve cryptography (ECC) processor is proposed. The ECC processor has been designed based on Edwards curves defined over the finite prime field GF ((2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> - 1) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> ). Modular multiplication in the proposed ECC processor is carried out in the frequency domain using a Discrete Fourier Transform (DFT) modular multiplier. Different base field adders and base field multipliers have been designed and utilized in the design of the DFT modular multiplier. The ECC processor has been described and functionally tested using the VHDL language and the simulation tool in the Xilinx ISE14.2. Furthermore, the ECC processor has been synthesized using the synthesis tool in the Xilinx ISE14.2, targeting the Virtex-5 FPGA family. Our synthesis results show that the proposed ECC processor achieves higher speed with minor area penalty compared to the similar work in the literature.