FPGA Implementation for Real-Time Epoch Extraction in Speech Signal

Abstract

During the production of a speech, the instant of significant excitation’s are called epochs. In speech processing, epochs plays a significant role and used in many applications. Accurate detection of epochs from the speech is a challenging task due to time varying nature of the vocal-tract system and excitation source. To detect the epochs from the speech signal several algorithms are already proposed. Zero Frequency Filter (ZFF) approach is one among the different techniques which gives better performance. This method is based on the impulse nature of the excitation source and not affected by the vocal-tract system characteristics. The original filter design of ZFF realized as Infinite Impulse Response (IIR) filter followed by two detrenders. Due to the unstable nature of IIR filter, later the ZFF is realized as the Zero-Band Filter (ZBF). In this paper, we have designed the hardware architectures for IIR and ZBF realization of ZFF. The hardware architectures of ZFF are verified by implementing it on FPGA (ZedBoard Zynq Evaluation and Development Kit xc7z020clg4841) using Xilinx system generator-2016.2.