A Simplified Realization of Zero Frequency Filter for Hardware Implementation

Abstract

Zero frequency filtering (ZFF) is a well-explored technique for detecting glottal closure instants (GCIs) from the speech signal. The features extracted from the ZFF of the speech signal have also been used for many speech-based applications. Zero frequency resonators used in the infinite impulse response (IIR) realization of ZFF are unstable filters. Consequently, the filter output grows or decays in an unbounded manner. In the finite impulse response (FIR) realization of ZFF, the filter instability problem is address by using more adders and multipliers. In this paper, a simplified stable IIR realization of ZFF (SIIR-ZFF) is proposed for efficient hardware implementation. The SIIR-ZFF requires significantly less hardware than the earlier reported IIR-ZFF as well as FIR-ZFF. Performance of the proposed approach for the task of detecting GCIs from speech signal is found to be almost equivalent to that of the conventional IIR-ZFF. The hardware architecture for the proposed approach is designed and implemented on FPGA.