Abstract

In this study, an iterative reduction based heuristic algorithm (IRHA) based closed loop control and space vector PWM (SVPWM) control of the Z-source inverter are implemented in hardware. The third harmonic addition method is used to realize the SVPWM structure in programmable embedded environment. The control parameters are optimally determined by IRHA to overcome the problem of instability. The controllers are implemented in single Field-Programmable Gate Array (FPGA) chip using hardware description language without help of any IP core units which increases speed, accuracy, compactness and cost efficiency. Furthermore, power consumption of the controllers is lower than a conventional ones which is prominent advantage of employing FPGAs. The effectiveness and accuracy of the control structure are verified by experimental results.

Highlights

  • In the past years, DC motors have been used extensively for industrial purposes [1]

  • Conventional motor drive circuits are based on a Voltage Source Converter (VSC) and consist of a diode rectifier front end, a dc link capacitor, a dc inductor and inverter bridge

  • The Z-source inverter is modeled by a statespace-average technique and the related transfer functions is derived

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Summary

Introduction

DC motors have been used extensively for industrial purposes [1]. The DC motor provides high starting torque, it has some disadvantages that require high maintenance and are not suitable for hazardous environments [2]. Induction has replaced the labor force in the industry instead of the dc motor due to its robustness, less maintenance requirements, high efficiency, and low cost [3] , [4]. The efficiency of the induction motors is highly dependent on the drive circuit, the PWM strategy and the closed loop control structure. Conventional motor drive circuits are based on a Voltage Source Converter (VSC) and consist of a diode rectifier front end, a dc link capacitor, a dc inductor and inverter bridge. The performance and reliability of this structure is compromised due to faults in VSC structure, dead time and general mode voltage [5]–[7]

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